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VME SBC A25 PCIe to VME bridge
Commit e30029f5 authored by Tristan Gingold's avatar Tristan Gingold
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wb_bus: remove most of wbm for vme

parent d067b548
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Showing with 11 additions and 45 deletions
hdl/top/wb_bus.vhd
View file @ e30029f5
......@@ -117,7 +117,6 @@ ARCHITECTURE wb_bus_arch OF wb_bus IS
SIGNAL wbmi_0_int : wbi_type;
SIGNAL wbmo_0_cyc_s : std_logic;
SIGNAL wbmi_1_int : wbi_type;
SIGNAL wbmo_1_cyc_s : std_logic;
SIGNAL wbmi_2_int : wbi_type;
SIGNAL wbmo_2_cyc_s : std_logic;
SIGNAL wbmi_3_int : wbi_type;
......@@ -151,14 +150,9 @@ BEGIN
wbmi_0_int.err <= wbs_0_err OR wbs_1_err OR wbs_2_err(0) OR wbs_3_err(0);
-- data multiplexer for master #1
data_mux (
cyc => wbmo_1_cyc,
data_in_0 => wbso_3.dat,
data_in_1 => wbso_4.dat,
data_out => wbmi_1_int.dat
);
wbmi_1_int.ack <= wbs_3_ack(1) OR wbs_4_ack(0);
wbmi_1_int.err <= wbs_3_err(1) OR wbs_4_err(0);
wbmi_1_int.dat <= (others => 'X');
wbmi_1_int.ack <= '0';
wbmi_1_int.err <= '0';
-- data multiplexer for master #2
data_mux (
......@@ -238,7 +232,7 @@ BEGIN
);
-- sf for slave #3:
sf_3: entity work.switch_fab_3
sf_3: entity work.switch_fab_2
GENERIC MAP (
registered => FALSE
)
......@@ -250,14 +244,10 @@ BEGIN
cyc_0 => wbmo_0_cyc(3),
ack_0 => wbs_3_ack(0),
err_0 => wbs_3_err(0),
wbo_1 => wbmo_1,
cyc_1 => wbmo_1_cyc(0),
ack_1 => wbs_3_ack(1),
err_1 => wbs_3_err(1),
wbo_2 => wbmo_2,
cyc_2 => wbmo_2_cyc(1),
ack_2 => wbs_3_ack(2),
err_2 => wbs_3_err(2),
wbo_1 => wbmo_2,
cyc_1 => wbmo_2_cyc(1),
ack_1 => wbs_3_ack(2),
err_1 => wbs_3_err(2),
-- slave bus:
wbo_slave => wbso_3,
wbi_slave => wbsi_3_int,
......@@ -274,9 +264,9 @@ BEGIN
rst => rst,
-- master busses:
wbo_0 => wbmo_1,
cyc_0 => wbmo_1_cyc(1),
ack_0 => wbs_4_ack(0),
err_0 => wbs_4_err(0),
cyc_0 => '0',
ack_0 => open,
err_0 => open,
wbo_1 => wbmo_2,
cyc_1 => wbmo_2_cyc(2),
ack_1 => wbs_4_ack(1),
......@@ -316,30 +306,6 @@ BEGIN
co => open
);
wbmo_1_cyc_s <= '1' WHEN wbmo_1_cyc = 0 ELSE '1';
wbm_1: entity work.wbmon
GENERIC MAP (
wbname => "wbm_1",
sets => sets,
timeout => timeout
)
PORT MAP (
clk => clk,
rst => rst,
adr => wbmo_1.adr,
sldat_i => wbmo_1.dat,
sldat_o => wbmi_1_int.dat,
cti => wbmo_1.cti,
sel => wbmo_1.sel,
cyc => wbmo_1_cyc_s,
stb => wbmo_1.stb,
ack => wbmi_1_int.ack,
err => wbmi_1_int.err,
we => wbmo_1.we,
er => open,
co => open
);
wbmo_2_cyc_s <= '1' WHEN wbmo_2_cyc = 0 ELSE '1';
wbm_2: entity work.wbmon
GENERIC MAP (
......
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