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VME64x core
Commits
3ee97c19
Commit
3ee97c19
authored
Jan 23, 2020
by
Tristan Gingold
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top_tb: add debug code.
parent
f41cbe6f
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top_tb.vhd
hdl/testbench/simple_tb/top_tb.vhd
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hdl/testbench/simple_tb/top_tb.vhd
View file @
3ee97c19
...
...
@@ -739,6 +739,7 @@ begin
assert
addr
(
2
downto
0
)
=
"000"
report
"unaligned read64_mblt"
severity
error
;
for
i
in
data
'range
loop
wait
for
50
ns
;
VME_DS_n_i
<=
"00"
;
read_wait_dtack
;
if
bus_timer
=
'0'
then
...
...
@@ -1281,6 +1282,10 @@ begin
write8_conf
(
x"7_fffb"
,
b"0001_0000"
);
read64_mblt
(
x"64_00_00_10"
,
c_AM_A32_MBLT
,
v64
(
0
to
1
));
report
"at 04: "
&
hex8
(
v64
(
0
)(
63
downto
32
));
report
"at 05: "
&
hex8
(
v64
(
0
)(
31
downto
0
));
report
"at 06: "
&
hex8
(
v64
(
1
)(
63
downto
32
));
report
"at 07: "
&
hex8
(
v64
(
1
)(
31
downto
0
));
assert
v64
(
0
)
=
x"0000_0004_0000_0500"
and
v64
(
1
)
=
x"0006_0000_0700_0000"
report
"incorrect MBLT data 64"
severity
error
;
...
...
@@ -1291,6 +1296,10 @@ begin
x"fe_dc_ba_98_76_54_32_10"
);
write64_mblt
(
x"64_00_01_00"
,
c_AM_A32_MBLT
,
v64
(
0
to
3
));
read64_mblt
(
x"64_00_01_00"
,
c_AM_A32_MBLT
,
v64
(
0
to
3
));
report
"at 40: "
&
hex8
(
v64
(
0
)(
63
downto
32
));
report
"at 41: "
&
hex8
(
v64
(
0
)(
31
downto
0
));
report
"at 42: "
&
hex8
(
v64
(
1
)(
63
downto
32
));
report
"at 43: "
&
hex8
(
v64
(
1
)(
31
downto
0
));
assert
v64
(
0
to
3
)
=
(
x"00_11_22_33_44_55_66_77"
,
x"88_99_aa_bb_cc_dd_ee_ff"
,
x"01_23_45_67_89_ab_cd_ef"
,
...
...
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