correction on stall_i input signal

git-svn-id: http://svn.ohwr.org/vme64x-core/trunk@149 665b4545-5c6b-4c24-801b-41150b02b44b

correction on stall_i input signal
git-svn-id: http://svn.ohwr.org/vme64x-core/trunk@149 665b4545-5c6b-4c24-801b-41150b02b44b
b02692df · dpedrett · b1952d7f · b02692df · b02692df
Commit b02692df authored Jul 23, 2012 by dpedrett
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Showing with 9 additions and 6 deletions

VME_Wb_master.vhd hdl/vme64x-core/rtl/VME_Wb_master.vhd +5 -4

VME_bus.vhd hdl/vme64x-core/rtl/VME_bus.vhd +4 -2

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--- a/hdl/vme64x-core/rtl/VME_Wb_master.vhd
+++ b/hdl/vme64x-core/rtl/VME_Wb_master.vhd
@@ -90,13 +90,13 @@ end VME_Wb_master;

 architecture Behavioral of VME_Wb_master is
 signal s_shift_dx  :   std_logic;
-
+signal s_cyc       :   std_logic;
 -- stb_o handler
 begin
   process(clk_i)
   begin
      if rising_edge(clk_i) then
-         if s_reset = '1' or s_mainFSMreset = '1' or stall_i = '0' then
+         if s_reset = '1' or s_mainFSMreset = '1' or (stall_i = '0' and s_cyc = '1') then
            memReq_o <= '0';
         elsif s_memReq = '1' and s_cardSel = '1' and s_BERRcondition = '0' then	 
            memReq_o <= '1';
@@ -108,12 +108,13 @@ begin
   begin
      if rising_edge(clk_i) then
         if s_reset = '1' or s_mainFSMreset = '1' or memAckWB_i = '1' then
-            cyc_o <= '0';
+            s_cyc <= '0';
         elsif s_memReq = '1' and s_cardSel = '1' and s_BERRcondition = '0' then	 
-            cyc_o <= '1';
+            s_cyc <= '1';
         end if;
      end if;
   end process;
+	cyc_o  <= s_cyc;
 -- shift s_sel, we need to this process when W32 is '1'.
   process(s_sel)
   begin

--- a/hdl/vme64x-core/rtl/VME_bus.vhd
+++ b/hdl/vme64x-core/rtl/VME_bus.vhd
@@ -44,7 +44,8 @@
 -- Version      v0.01  
 --______________________________________________________________________________
 --                               GNU LESSER GENERAL PUBLIC LICENSE                                
--                              ------------------------------------                              
+--                              ------------------------------------    
+-- Copyright (c) 2009 - 2011 CERN                           
 -- This source file is free software; you can redistribute it and/or modify it under the terms of 
 -- the GNU Lesser General Public License as published by the Free Software Foundation; either     
 -- version 2.1 of the License, or (at your option) any later version.                             
@@ -607,7 +608,8 @@ begin
                  end if;

                  if VME_DS_n_i = "11" then
-                     s_mainFSMstate <= DECIDE_NEXT_CYCLE;
+                     s_mainFSMstate  <= DECIDE_NEXT_CYCLE;
+							s_FSM.s_dataDir <= '0';
                  else
                     s_mainFSMstate <= DTACK_LOW;
                  end if;