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White Rabbit core collection
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Cycle Analytics
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White Rabbit core collection
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2ce72bf51b694b4173f4cfb605e1a1a5a0f31493
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wr-cores
sim
wrc_syscon_regs.vh
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Avoid naming AD9516 and moulded PLL interface such that it also suits an LTC6950
· 04fd6b13
Peter Jansweijer
authored
Jan 16, 2020
Adding pll_wr_mode[1:0] for SPEC7 V2
04fd6b13
wrc_syscon_regs.vh
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