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White Rabbit core collection
Commit 306ef2bb authored by Peter Jansweijer's avatar Peter Jansweijer Committed by Grzegorz Daniluk
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forwarded timestamp helper signals to DIO-card outputs. 

txts -> dio_p/n_o[2] (= Lemo 3)
rxts -> dio_p/n_o[1] (= Lemo 2; formerly used for 62.5 MHz RefClk)
parent 4cf3a2df
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Showing with 36 additions and 1 deletion
board/common/wr_board_pkg.vhd
View file @ 306ef2bb
...@@ -152,6 +152,8 @@ package wr_board_pkg is ...@@ -152,6 +152,8 @@ package wr_board_pkg is
tm_clk_aux_locked_o : out std_logic_vector(g_aux_clks-1 downto 0); tm_clk_aux_locked_o : out std_logic_vector(g_aux_clks-1 downto 0);
timestamps_o : out t_txtsu_timestamp; timestamps_o : out t_txtsu_timestamp;
timestamps_ack_i : in std_logic := '1'; timestamps_ack_i : in std_logic := '1';
txts_o : out std_logic;
rxts_o : out std_logic;
fc_tx_pause_req_i : in std_logic := '0'; fc_tx_pause_req_i : in std_logic := '0';
fc_tx_pause_delay_i : in std_logic_vector(15 downto 0) := x"0000"; fc_tx_pause_delay_i : in std_logic_vector(15 downto 0) := x"0000";
fc_tx_pause_ready_o : out std_logic; fc_tx_pause_ready_o : out std_logic;
......
board/common/xwrc_board_common.vhd
View file @ 306ef2bb
...@@ -216,6 +216,12 @@ entity xwrc_board_common is ...@@ -216,6 +216,12 @@ entity xwrc_board_common is
timestamps_o : out t_txtsu_timestamp; timestamps_o : out t_txtsu_timestamp;
timestamps_ack_i : in std_logic := '1'; timestamps_ack_i : in std_logic := '1';
-----------------------------------------
-- Timestamp helper signals, used for Absolute Calibration
-----------------------------------------
txts_o : out std_logic;
rxts_o : out std_logic;
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
-- Pause Frame Control -- Pause Frame Control
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
...@@ -402,6 +408,8 @@ begin -- architecture struct ...@@ -402,6 +408,8 @@ begin -- architecture struct
wrf_snk_i => wrf_snk_in, wrf_snk_i => wrf_snk_in,
timestamps_o => timestamps_o, timestamps_o => timestamps_o,
timestamps_ack_i => timestamps_ack_i, timestamps_ack_i => timestamps_ack_i,
txts_o => txts_o,
rxts_o => rxts_o,
fc_tx_pause_req_i => fc_tx_pause_req_i, fc_tx_pause_req_i => fc_tx_pause_req_i,
fc_tx_pause_delay_i => fc_tx_pause_delay_i, fc_tx_pause_delay_i => fc_tx_pause_delay_i,
fc_tx_pause_ready_o => fc_tx_pause_ready_o, fc_tx_pause_ready_o => fc_tx_pause_ready_o,
......
board/spec/wr_spec_pkg.vhd
View file @ 306ef2bb
...@@ -97,6 +97,8 @@ package wr_spec_pkg is ...@@ -97,6 +97,8 @@ package wr_spec_pkg is
tm_clk_aux_locked_o : out std_logic_vector(g_aux_clks-1 downto 0); tm_clk_aux_locked_o : out std_logic_vector(g_aux_clks-1 downto 0);
timestamps_o : out t_txtsu_timestamp; timestamps_o : out t_txtsu_timestamp;
timestamps_ack_i : in std_logic := '1'; timestamps_ack_i : in std_logic := '1';
txts_o : out std_logic;
rxts_o : out std_logic;
fc_tx_pause_req_i : in std_logic := '0'; fc_tx_pause_req_i : in std_logic := '0';
fc_tx_pause_delay_i : in std_logic_vector(15 downto 0) := x"0000"; fc_tx_pause_delay_i : in std_logic_vector(15 downto 0) := x"0000";
fc_tx_pause_ready_o : out std_logic; fc_tx_pause_ready_o : out std_logic;
......
board/spec/wrc_board_spec.vhd
View file @ 306ef2bb
...@@ -260,6 +260,12 @@ entity wrc_board_spec is ...@@ -260,6 +260,12 @@ entity wrc_board_spec is
tstamps_incorrect_o : out std_logic; tstamps_incorrect_o : out std_logic;
tstamps_ack_i : in std_logic := '1'; tstamps_ack_i : in std_logic := '1';
-----------------------------------------
-- Timestamp helper signals, used for Absolute Calibration
-----------------------------------------
txts_o : out std_logic;
rxts_o : out std_logic;
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
-- Pause Frame Control -- Pause Frame Control
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
...@@ -485,6 +491,8 @@ begin -- architecture struct ...@@ -485,6 +491,8 @@ begin -- architecture struct
tm_clk_aux_locked_o => tm_clk_aux_locked_o, tm_clk_aux_locked_o => tm_clk_aux_locked_o,
timestamps_o => timestamps_out, timestamps_o => timestamps_out,
timestamps_ack_i => tstamps_ack_i, timestamps_ack_i => tstamps_ack_i,
txts_o => txts_o,
rxts_o => rxts_o,
fc_tx_pause_req_i => fc_tx_pause_req_i, fc_tx_pause_req_i => fc_tx_pause_req_i,
fc_tx_pause_delay_i => fc_tx_pause_delay_i, fc_tx_pause_delay_i => fc_tx_pause_delay_i,
fc_tx_pause_ready_o => fc_tx_pause_ready_o, fc_tx_pause_ready_o => fc_tx_pause_ready_o,
......
board/spec/xwrc_board_spec.vhd
View file @ 306ef2bb
...@@ -216,6 +216,12 @@ entity xwrc_board_spec is ...@@ -216,6 +216,12 @@ entity xwrc_board_spec is
timestamps_o : out t_txtsu_timestamp; timestamps_o : out t_txtsu_timestamp;
timestamps_ack_i : in std_logic := '1'; timestamps_ack_i : in std_logic := '1';
-----------------------------------------
-- Timestamp helper signals, used for Absolute Calibration
-----------------------------------------
txts_o : out std_logic;
rxts_o : out std_logic;
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
-- Pause Frame Control -- Pause Frame Control
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
...@@ -496,6 +502,8 @@ begin -- architecture struct ...@@ -496,6 +502,8 @@ begin -- architecture struct
tm_clk_aux_locked_o => tm_clk_aux_locked_o, tm_clk_aux_locked_o => tm_clk_aux_locked_o,
timestamps_o => timestamps_o, timestamps_o => timestamps_o,
timestamps_ack_i => timestamps_ack_i, timestamps_ack_i => timestamps_ack_i,
txts_o => txts_o,
rxts_o => rxts_o,
fc_tx_pause_req_i => fc_tx_pause_req_i, fc_tx_pause_req_i => fc_tx_pause_req_i,
fc_tx_pause_delay_i => fc_tx_pause_delay_i, fc_tx_pause_delay_i => fc_tx_pause_delay_i,
fc_tx_pause_ready_o => fc_tx_pause_ready_o, fc_tx_pause_ready_o => fc_tx_pause_ready_o,
......
top/spec_ref_design/spec_wr_ref_top.vhd
View file @ 306ef2bb
...@@ -286,6 +286,8 @@ architecture top of spec_wr_ref_top is ...@@ -286,6 +286,8 @@ architecture top of spec_wr_ref_top is
signal onewire_oe : std_logic; signal onewire_oe : std_logic;
-- LEDs and GPIO -- LEDs and GPIO
signal wrc_txts_out : std_logic;
signal wrc_rxts_out : std_logic;
signal wrc_pps_out : std_logic; signal wrc_pps_out : std_logic;
signal wrc_pps_led : std_logic; signal wrc_pps_led : std_logic;
signal wrc_pps_in : std_logic; signal wrc_pps_in : std_logic;
...@@ -471,6 +473,9 @@ begin -- architecture top ...@@ -471,6 +473,9 @@ begin -- architecture top
wb_eth_master_o => cnx_master_out(c_WB_MASTER_ETHBONE), wb_eth_master_o => cnx_master_out(c_WB_MASTER_ETHBONE),
wb_eth_master_i => cnx_master_in(c_WB_MASTER_ETHBONE), wb_eth_master_i => cnx_master_in(c_WB_MASTER_ETHBONE),
txts_o => wrc_txts_out,
rxts_o => wrc_rxts_out,
pps_ext_i => wrc_pps_in, pps_ext_i => wrc_pps_in,
pps_p_o => wrc_pps_out, pps_p_o => wrc_pps_out,
...@@ -538,7 +543,9 @@ begin -- architecture top ...@@ -538,7 +543,9 @@ begin -- architecture top
wrc_pps_in <= dio_in(3); wrc_pps_in <= dio_in(3);
dio_out(0) <= wrc_pps_out; dio_out(0) <= wrc_pps_out;
dio_out(1) <= clk_ref_div2; -- dio_out(1) <= clk_ref_div2;
dio_out(1) <= wrc_rxts_out;
dio_out(2) <= wrc_txts_out;
-- LEDs -- LEDs
U_Extend_PPS : gc_extend_pulse U_Extend_PPS : gc_extend_pulse
......
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