Commit 96d9c8fa authored by Tomasz Wlostowski's avatar Tomasz Wlostowski

simulation models: IWishboneSlave: added random error generation

parent c42caac4
...@@ -58,9 +58,11 @@ interface IWishboneSlave ...@@ -58,9 +58,11 @@ interface IWishboneSlave
struct { struct {
wb_cycle_type_t mode; wb_cycle_type_t mode;
int gen_random_stalls; int gen_random_stalls;
int gen_random_errors;
int stall_min_duration; int stall_min_duration;
int stall_max_duration; int stall_max_duration;
real stall_prob; real stall_prob;
real error_prob;
} settings; } settings;
int permanent_stall = 0; int permanent_stall = 0;
...@@ -199,6 +201,11 @@ interface IWishboneSlave ...@@ -199,6 +201,11 @@ interface IWishboneSlave
c_queue.push_back(current_cycle); c_queue.push_back(current_cycle);
end end
if(cyc && settings.gen_random_errors && probability_hit(settings.error_prob))
err <= 1;
else
err <= 0;
if(stb && we && !stall && cyc) begin if(stb && we && !stall && cyc) begin
int oc, lzc, tzc; int oc, lzc, tzc;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment