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Maciej Lipinski authored
The generic g_ref_clk_rate was dummy, i.e. never used. The module pulse_stamper is used with input reference clock (and tm_cycles_i) of 125MHz and 62.5MHz clock, in the wr_streamers. Added possibility to define what clock is used (default 125MHz or 62.5MHz). In any case, the output timestamp is of cycle period of 8ns.
aebe750e
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| .. | ||
| fabric | ||
| timing | ||
| wr_dacs | ||
| wr_eca | ||
| wr_endpoint | ||
| wr_mini_nic | ||
| wr_pps_gen | ||
| wr_si57x_interface | ||
| wr_softpll_ng | ||
| wr_streamers | ||
| wr_tbi_phy | ||
| wr_tlu | ||
| wrc_core | ||
| Manifest.py |