Commit 7f2ca82a authored by Jean-Claude BAU's avatar Jean-Claude BAU

wr_date: Fix issue accessing the timing mode

parent 00e214e2
Subproject commit 9b1ae8a387a078755e59b3df6a2b034dc464460c Subproject commit 3c27f391927480457dff031cdc8ccb15eb046230
...@@ -21,6 +21,7 @@ ...@@ -21,6 +21,7 @@
#include <libwr/softpll_export.h> #include <libwr/softpll_export.h>
#include <libwr/util.h> #include <libwr/util.h>
#include <time_lib.h> #include <time_lib.h>
#include <rt_ipc.h>
#ifndef MOD_TAI #ifndef MOD_TAI
#define MOD_TAI 0x80 #define MOD_TAI 0x80
...@@ -506,26 +507,18 @@ int wrdate_internal_set_gm(volatile struct PPSG_WB *pps) { ...@@ -506,26 +507,18 @@ int wrdate_internal_set_gm(volatile struct PPSG_WB *pps) {
return 0; return 0;
} }
#define SPLL_MAGIC 0x5b1157a7
#define FPGA_SPLL_STAT 0x10006800
int getTimingMode(void) { int getTimingMode(void) {
static struct spll_stats *spll_stats_p; static int connected=FALSE;
struct rts_pll_state pstate;
if ( spll_stats_p==NULL ) { if ( !connected ) {
spll_stats_p = create_map(FPGA_SPLL_STAT,sizeof(*spll_stats_p)); if( rts_connect(NULL) < 0)
if ( spll_stats_p==NULL ) {
fprintf(stderr, "Cannot create map to Soft Pll stats\n");
return -1;
}
if (spll_stats_p->magic != SPLL_MAGIC) {
/* Wrong magic */
fprintf(stderr, "Soft PLL: unknown magic %x (known is %x)\n",
spll_stats_p->magic, SPLL_MAGIC);
return -1; return -1;
} connected=TRUE;
} }
return spll_stats_p->mode; if (rts_get_state(&pstate)<0 )
return -1;
return pstate.mode;
} }
/* Frontend to the set mechanism: parse the argument */ /* Frontend to the set mechanism: parse the argument */
...@@ -536,7 +529,8 @@ int wrdate_set(volatile struct PPSG_WB *pps, int argc, char **argv) ...@@ -536,7 +529,8 @@ int wrdate_set(volatile struct PPSG_WB *pps, int argc, char **argv)
struct timeval tv; struct timeval tv;
if (!strcmp(argv[0], "host")) { if (!strcmp(argv[0], "host")) {
switch (getTimingMode()) { int tm=getTimingMode();
switch (tm) {
case SPLL_MODE_GRAND_MASTER: case SPLL_MODE_GRAND_MASTER:
return wrdate_internal_set_gm(pps); return wrdate_internal_set_gm(pps);
case SPLL_MODE_FREE_RUNNING_MASTER : case SPLL_MODE_FREE_RUNNING_MASTER :
...@@ -547,7 +541,7 @@ int wrdate_set(volatile struct PPSG_WB *pps, int argc, char **argv) ...@@ -547,7 +541,7 @@ int wrdate_set(volatile struct PPSG_WB *pps, int argc, char **argv)
fprintf(stderr, "Slave timing mode: WR time cannot be set!!!\n"); fprintf(stderr, "Slave timing mode: WR time cannot be set!!!\n");
return -1; return -1;
default: default:
fprintf(stderr, "Cannot read Soft PLL timing mode. WR time cannot be set.\n"); fprintf(stderr, "Cannot read Soft PLL timing mode. WR time cannot be set (ret=%d)\n",tm);
return -1; return -1;
} }
} }
......
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