Increase wait time after switching from dmtd to ref_clock.

Sometimes there was an issue that the link didn't came up or the slave halted in state "listening". This might have been due to the sysclk PLL not yet being in lock after switching to ref_clock.

Increase wait time after switching from dmtd to ref_clock.
Sometimes there was an issue that the link didn't came up or the slave halted in state "listening". This might have been due to the sysclk PLL not yet being in lock after switching to ref_clock.
59775109 · Peter Jansweijer · ee45de9b · 59775109
Commit 59775109 authored Dec 20, 2019 by Peter Jansweijer
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ad9516.c dev/ad9516.c +2 -1

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--- a/dev/ad9516.c
+++ b/dev/ad9516.c
@@ -259,7 +259,8 @@ int spec7_ad9516_init(int ext_10mhz)
  pp_printf("Switch clk_sys source from free running clk_dmtd to AD9516 output.\n");
 	/* AD9516 now initialized so switch clk_sys from free running clk_dmtd to AD9516 output */
 	gpio_out(GPIO_PLL_CLK_SEL, 1);
-	timer_delay(10);
+	timer_delay(1000);
+  pp_printf("now running on ref clock.\n");

 }