Commit b26eac3d authored by Peter Jansweijer's avatar Peter Jansweijer

mend

parent c2f36004
Pipeline #5261 passed with stage
in 4 minutes and 11 seconds
......@@ -272,14 +272,14 @@ void gpio_control_init()
static void babywr_spll_setup(void)
{
int implement_two_stages = 1; // implement 2-stage ocxo lock later
int implement_two_stages = 0; // implement 2-stage ocxo lock later
/* configure a suitable PI gain schedule for the SoftPLL: */
spll_gain_schedule_t* gs= &spll_main_ocxo_gain_sched;
/* we start with the default SiT5359 values (Bandwidth ~20 Hz) */
gs->stages[0].kp = -4000; // use 1400 when X1 = 125 MHz
gs->stages[0].ki = -8;
gs->stages[0].kp = -5000; // use 1400 when X1 = 125 MHz
gs->stages[0].ki = -30;
gs->stages[0].lock_samples = 10000;
gs->stages[0].shift = 12;
......
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