VHDL : added the option to inhibit the outputs on an external signal for

the LINAC monotoring function On branch development modified: fpga/sources/registers_init.vhdl modified: fpga/sources/src_linacMON/linacMON_config.txt new file: fpga/sources/src_linacMON/linacMON_inhibition.vhdl modified: fpga/sources/src_linacMON/linacMON_top.vhdl modified: fpga/sources/top.vhdl

VHDL : added the option to inhibit the outputs on an external signal for
the LINAC monotoring function On branch development modified: fpga/sources/registers_init.vhdl modified: fpga/sources/src_linacMON/linacMON_config.txt new file: fpga/sources/src_linacMON/linacMON_inhibition.vhdl modified: fpga/sources/src_linacMON/linacMON_top.vhdl modified: fpga/sources/top.vhdl
dc0f3105 · Jean-Paul Ricaud · b09c456a · dc0f3105 · dc0f3105 · dc0f3105
Commit dc0f3105 authored Nov 21, 2014 by Jean-Paul Ricaud
5 changed files
--- a/fpga/sources/registers_init.vhdl
+++ b/fpga/sources/registers_init.vhdl
@@ -9,7 +9,7 @@
 -- File     : registers_init.vhdl
 -- Revision : x.x.x
 -- Created  : March 06, 2013
-- Updated  : September 19, 2014
+-- Updated  : November 20, 2014
 --------------------------------------------------------------------------------
 -- Author       : Jean-Paul Ricaud
 -- Organization : Synchrotron Soleil
@@ -78,7 +78,7 @@ package registers_init is

  -- Read registers
  constant c_board_id     : std_logic_vector (31 downto 0) := X"4AC0FA5C"; -- board ID for TimEX3
-  constant c_firmware_rev : std_logic_vector (31 downto 0) := X"000000B4"; -- firmware's version
+  constant c_firmware_rev : std_logic_vector (31 downto 0) := X"000000B5"; -- firmware's version

 end package registers_init;


--- a/fpga/sources/src_linacMON/linacMON_config.txt
+++ b/fpga/sources/src_linacMON/linacMON_config.txt
@@ -7,14 +7,14 @@
 -- File     : linacMON_config.txt
 -- Revision : x.x.x
 -- Created  : July 10, 2013
-- Updated  : July 10, 2013
+-- Updated  : November 20, 2014
 --------------------------------------------------------------------------------
 -- Author       : Jean-Paul Ricaud
 -- Organization : Synchrotron Soleil
 -- Web          : http://www.synchrotron-soleil.fr
 -- Email        : jean-paul.ricaud@synchrotron-soleil.fr
 --------------------------------------------------------------------------------
-- Copyright (C) 2012 - 2013 Synchrotron Soleil
+-- Copyright (C) 2012 - 2014 Synchrotron Soleil
 --
 -- This program is free software: you can redistribute it and/or modify
 -- it under the terms of the GNU Lesser General Public License as published by
@@ -36,7 +36,7 @@
 --------------------------------------------------------------------------------

 ===============================================================================
-Configuration : LINAC monitoring 2 inputs - 3 output
+Configuration : LINAC monitoring 2 inputs - 3 outputs

 SW : 5-4-3-2-1-0
     0-0-0-0-1-1
@@ -45,12 +45,12 @@ IO0 : input  - input SPM signal
 IO1 : input  - input LPM signal
 IO2 : output - SPM signal
 IO3 : output - LPM signal
-IO4 : output - not used
+IO4 : input  - inhibit outputs

 Green LED on = OK
 Red LED on   = simultaneous SPM and LPM triggers detected

-R3, R16, R29, R30, R31 => Qty = 1
-R6, R28, R17, R18, R19 => Qty = 0
+R3, R16, R29, R30, R19 => Qty = 1
+R6, R28, R17, R18, R31 => Qty = 0
 ===============================================================================

--- a/fpga/sources/src_linacMON/linacMON_inhibition.vhdl
+++ b/fpga/sources/src_linacMON/linacMON_inhibition.vhdl
+--------------------------------------------------------------------------------
+-- Title   : Inhibition - LINAC monitoring function
+-- Project : TimEX3
+--------------------------------------------------------------------------------
+-- Description : If the inhibition is at low level, the outputs are inhibited
+--
+--------------------------------------------------------------------------------
+-- File     : linacMON_inhibition.vhdl
+-- Revision : x.x.x
+-- Created  : November 20, 2014
+-- Updated  : November 20, 2014
+--------------------------------------------------------------------------------
+-- Author       : Jean-Paul Ricaud
+-- Organization : Synchrotron Soleil
+-- Web          : http://www.synchrotron-soleil.fr
+-- Email        : jean-paul.ricaud@synchrotron-soleil.fr
+--------------------------------------------------------------------------------
+-- Copyright (C) 2012 - 2014 Synchrotron Soleil
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU Lesser General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU Lesser General Public License for more details.
+--
+-- You should have received a copy of the GNU Lesser General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>
+--------------------------------------------------------------------------------
+--
+--------------------------------------------------------------------------------
+-- Modifications :
+--
+--------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+library work;
+use work.registers_init.all;
+
+--------------------------------------------------------------------------------
+--------------------------------- ENTITY ---------------------------------------
+--------------------------------------------------------------------------------
+entity linacMON_inhibition is
+  port (
+    p_reset      : in  std_logic;
+    p_clk60MHz   : in  std_logic;
+    p_inputs     : in  std_logic_vector (1 downto 0); -- input TTL
+    p_inhibition : in  std_logic;
+    p_outputs    : out std_logic_vector (1 downto 0)
+  );
+end entity linacMON_inhibition;
+
+--------------------------------------------------------------------------------
+------------------------------- ARCHITECTURE -----------------------------------
+--------------------------------------------------------------------------------
+architecture rtl_linacMON_inhibition of linacMON_inhibition is
+
+  ------------------------------------------------------------------------------
+  -- constant
+  ------------------------------------------------------------------------------
+
+  ------------------------------------------------------------------------------
+  -- signal
+  ------------------------------------------------------------------------------
+  signal s_holdInhibit : std_logic_vector (2 downto 0); -- synchronous inhibition
+
+  ------------------------------------------------------------------------------
+  --------------------------------- Main ---------------------------------------
+  ------------------------------------------------------------------------------
+  begin
+
+  -- Synchronization of the external async inhibition signal with the 60MHz clock
+  process (p_clk60MHz, p_reset)
+  begin
+    if (p_reset = '1') then
+      s_holdInhibit <= (OTHERS => '0');
+    elsif (rising_edge(p_clk60MHz)) then
+      s_holdInhibit(0) <= p_inhibition;
+      s_holdInhibit(1) <= s_holdInhibit(0);
+      s_holdInhibit(2) <= s_holdInhibit(1);
+    end if;
+  end process;
+
+  ------------------------------------------------------------------------------
+  ------------------------------------------------------------------------------
+  p_outputs(0) <= p_inputs(0) and s_holdInhibit(2);
+  p_outputs(1) <= p_inputs(1) and s_holdInhibit(2);
+
+end architecture rtl_linacMON_inhibition;
--- a/fpga/sources/src_linacMON/linacMON_top.vhdl
+++ b/fpga/sources/src_linacMON/linacMON_top.vhdl
@@ -9,7 +9,7 @@
 -- File     : linacMON_top.vhdl
 -- Revision : x.x.x
 -- Created  : July 09, 2013
-- Updated  : July 10, 2013
+-- Updated  : November 20, 2014
 --------------------------------------------------------------------------------
 -- Author       : Jean-Paul Ricaud
 -- Organization : Synchrotron Soleil
@@ -47,6 +47,7 @@ use ieee.numeric_std.all;
 entity linacMON_top is
  port (
    p_linacMON_inTTL             : in  std_logic_vector (1 downto 0); -- TTL inputs
+    p_linacMON_inInhibit         : in  std_logic; -- TTL input for outputs inhibition
    p_linacMON_outTTL            : out std_logic_vector (4 downto 0); -- TTL outputs
    p_linacMON_outPECL           : out std_logic_vector (4 downto 0); -- LVPECL outputs
    p_linacMON_clk1kHz           : in  std_logic;
@@ -77,7 +78,8 @@ architecture rtl_linacMON_top of linacMON_top is
  ------------------------------------------------------------------------------
  -- signal
  ------------------------------------------------------------------------------
-  signal s_simTrigg_error : std_logic; -- simultaneaous SPM / LPM error
+  signal s_simTrigg_error  : std_logic; -- simultaneaous SPM / LPM error
+  signal s_SPM_LPM_outputs : std_logic_vector (1 downto 0);

  ------------------------------------------------------------------------------
  --------------------------------- Main ---------------------------------------
@@ -107,14 +109,24 @@ architecture rtl_linacMON_top of linacMON_top is
        p_error       => s_simTrigg_error
      );

+    -- Inhibit the output if the inhibition input is at low level
+    inhibition : entity work.linacMON_inhibition (rtl_linacMON_inhibition)
+      port map (
+        p_reset       => p_linacMON_reset,
+        p_clk60MHz    => p_linacMON_clk60MHz,
+        p_inputs      => p_linacMON_inTTL(1 downto 0),  -- TTL inputs
+        p_inhibition  => p_linacMON_inInhibit,
+        p_outputs     => s_SPM_LPM_outputs(1 downto 0)
+      );
+
    -- LEDs management for the monitoring function block
    -- The green LED is blinked for 5s after a reset or after a input pulse is
    -- dtected. It remains ON in other cases.
-    -- The red LED is off after a reset. It gos ON if no input signal is detected
-    -- after delay defined in the missingPulseDelay register.
+    -- The red LED is off after a reset. It gos ON if a simultaneous SPM and
+    -- LPM is detected.
    leds : entity work.linacMON_leds (rtl_linacMON_leds)
      port map (
-        p_inTTL           => p_linacMON_inTTL(1 downto 0),  -- TTL input
+        p_inTTL           => s_SPM_LPM_outputs(1 downto 0),  -- TTL input
        p_clk1kHz         => p_linacMON_clk1kHz,
        p_clk500mHz       => p_linacMON_clk500mHz,
        p_clk60MHz        => p_linacMON_clk60MHz,
@@ -131,9 +143,9 @@ architecture rtl_linacMON_top of linacMON_top is
  ------------------------------------------------------------------------------
  p_linacMON_outTTL  (0) <= '0'; -- not used ; is configured as input
  p_linacMON_outTTL  (1) <= '0'; -- not used ; is configured as input
-  p_linacMON_outTTL  (2) <= p_linacMON_inTTL(0); -- SPM
-  p_linacMON_outTTL  (3) <= p_linacMON_inTTL(1); -- LPM
-  p_linacMON_outTTL  (4) <= '0';
+  p_linacMON_outTTL  (2) <= s_SPM_LPM_outputs(0); -- SPM
+  p_linacMON_outTTL  (3) <= s_SPM_LPM_outputs(1); -- LPM
+  p_linacMON_outTTL  (4) <= '0'; -- not used ; is configured as input
  p_linacMON_outPECL (4 downto 0) <= "00000";

 end architecture rtl_linacMON_top;
--- a/fpga/sources/top.vhdl
+++ b/fpga/sources/top.vhdl
@@ -7,7 +7,7 @@
 -- File     : top.vhd
 -- Revision : x.x.x
 -- Created  : October 26, 2012
-- Updated  : October 06, 2014
+-- Updated  : November 20, 2014
 --------------------------------------------------------------------------------
 -- Author       : Jean-Paul Ricaud
 -- Organization : Synchrotron Soleil
@@ -32,23 +32,25 @@
 --
 --------------------------------------------------------------------------------
 -- Modifications :
--   Version 1.2.1 ; June 14 2013 ; Jean-Paul Ricaud
+--   Version 1.2.1 ; June 14, 2013 ; Jean-Paul Ricaud
 --     * Added delay on duplicated outputs to compensate the outputs offsets
--   Version 1.4.0 ; July 09 2013 ; Jean-Paul Ricaud
+--   Version 1.4.0 ; July 09, 2013 ; Jean-Paul Ricaud
 --     * Added LINAC monitoring function
--   Version 1.4.1 ; October 29 2013 ; Jean-Paul Ricaud
+--   Version 1.4.1 ; October 29, 2013 ; Jean-Paul Ricaud
 --     * Added a bit in the status register for top-up gating window active
 --     * Renamed some signals ; added comments
 --     * Added a config read register (duplication, top-up, etc.)
--   Version 1.6.0 ; November 18 2013 ; Jean-Paul Ricaud
+--   Version 1.6.0 ; November 18, 2013 ; Jean-Paul Ricaud
 --     * Multiplexed cPCI registers to overlap them depending on the
 --       configuration (duplication, top-up, etc.)
 --     * Duplication monitoring now reacts on rising edge of the signal instead
 --       of level
--   Version 1.6.1 ; February 03 2014 ; Jean-Paul Ricaud
+--   Version 1.6.1 ; February 03, 2014 ; Jean-Paul Ricaud
 --     * Added frequency divider block for slicing DG
--   Version 1.8.0 ; September 19 2014 ; Jean-Paul Ricaud
+--   Version 1.8.0 ; September 19, 2014 ; Jean-Paul Ricaud
 --     * Added clock padding for CRISTAL beamline laser syncgrinization
+--   Version 1.8.1 ; November 20, 2014 ; Jean-Paul Ricaud
+--     * Added outputs inhibition capability to LINAC monitoring config
 --
 --------------------------------------------------------------------------------

@@ -480,6 +482,7 @@ architecture rtl_top of top is
  LinacMON : entity work.linacMON_top (rtl_linacMON_top)
    port map (
      p_linacMON_inTTL             => pin_inTTL(1 downto 0),
+      p_linacMON_inInhibit         => pin_inTTL(4),
      p_linacMON_outTTL            => s_linacMONOutTTL,
      p_linacMON_outPECL           => s_linacMONOutPECL,
      p_linacMON_clk1kHz           => s_clk1kHz,