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Beam Positoning Monitor - Gateware
Commit 173733d3 authored by Lucas Russo's avatar Lucas Russo
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modules/*/wb_acq_core/*: fix DDR start address calculation 

We got "luck" that the previous calculation
was right.
parent 871cf7ce
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Showing with 7 additions and 8 deletions
hdl/modules/dbe_wishbone/wb_acq_core/acq_ddr3_axis_read.vhd
View file @ 173733d3
......@@ -159,8 +159,8 @@ architecture rtl of acq_ddr3_axis_read is
signal lmt_full_pkt_addr_ms : unsigned(42 downto 0);
signal lmt_pre_pkt_addr : unsigned(42 downto 0);
signal lmt_pre_full_addr : unsigned(42 downto 0);
signal lmt_pre_full_addr_m : unsigned(85 downto 0);
signal sample_size : unsigned(10 downto 0);
signal lmt_pre_full_addr_m : unsigned(42 downto 0);
signal lmt_curr_chan_width_bytes : unsigned(t_acq_width'length-1 downto 0);
-- DDR3 Signals
signal ddr_data_in : std_logic_vector(c_ddr_payload_width-1 downto 0);
......@@ -308,15 +308,14 @@ begin
end if;
end process;
sample_size <= g_acq_channels(to_integer(lmt_curr_chan_id_i)).width/
g_acq_channels(to_integer(lmt_curr_chan_id_i)).num_atoms/8;
lmt_curr_chan_width_bytes <= g_acq_channels(to_integer(lmt_curr_chan_id_i)).width/8; -- in bytes
lmt_full_pkt_addr_ss <= lmt_full_pkt_size*sample_size;
lmt_full_pkt_addr_ss <= lmt_full_pkt_size*lmt_curr_chan_width_bytes;
lmt_full_pkt_addr_ms <= lmt_full_pkt_addr_ss(lmt_full_pkt_addr_ss'left-lmt_shots_nb'length downto 0)*(lmt_shots_nb-1);
lmt_pre_pkt_addr <= lmt_pre_pkt_size*sample_size;
lmt_pre_pkt_addr <= lmt_pre_pkt_size*lmt_curr_chan_width_bytes;
lmt_pre_full_addr_m <= (lmt_full_pkt_addr_ms + lmt_pre_pkt_addr)*c_bytes_per_word;
lmt_pre_full_addr <= lmt_pre_full_addr_m(42 downto 0);
lmt_pre_full_addr_m <= (lmt_full_pkt_addr_ms + lmt_pre_pkt_addr); -- in bytes
lmt_pre_full_addr <= lmt_pre_full_addr_m; -- in bytes
----------------------------------------------------------------------------
-- Start reading
......
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