wb_fmc{130,250,516}: fix input trigger synchronization

The module gc_ext_sync_pulse requires the generic g_min_pulse_width to be at least the number of "ns" of one input clock cycle. Otherwise, it may not function properly, loosing input signals.

wb_fmc{130,250,516}: fix input trigger synchronization
The module gc_ext_sync_pulse requires the generic g_min_pulse_width to be at least the number of "ns" of one input clock cycle. Otherwise, it may not function properly, loosing input signals.
b20eb1aa · Lucas Russo · daa18772 · b20eb1aa · b20eb1aa · b20eb1aa
Commit b20eb1aa authored May 26, 2017 by Lucas Russo
3 changed files
--- a/hdl/modules/dbe_wishbone/wb_fmc130m_4ch/wb_fmc130m_4ch.vhd
+++ b/hdl/modules/dbe_wishbone/wb_fmc130m_4ch/wb_fmc130m_4ch.vhd
@@ -1427,8 +1427,8 @@ begin
  -- External hardware trigger synchronization
  cmp_trig_sync : gc_ext_pulse_sync
  generic map(
-    g_min_pulse_width                       => 1,     -- clk_i ticks
-    --g_clk_frequency                         => 1/g_adc_clk_period_values(g_ref_clk),   -- MHz
+    -- minimum pulse in ns to accept input (must be >1 clk_i ns)
+    g_min_pulse_width                       => 16,
    g_clk_frequency                         => 130,   -- MHz
    g_output_polarity                       => '0',   -- positive pulse
    g_output_retrig                         => false,

--- a/hdl/modules/dbe_wishbone/wb_fmc250m_4ch/wb_fmc250m_4ch.vhd
+++ b/hdl/modules/dbe_wishbone/wb_fmc250m_4ch/wb_fmc250m_4ch.vhd
@@ -1539,8 +1539,8 @@ begin
  -- External hardware trigger synchronization
  cmp_trig_sync : gc_ext_pulse_sync
  generic map(
-    g_min_pulse_width                       => 1,     -- clk_i ticks
-    --g_clk_frequency                         => 1/g_adc_clk_period_values(g_ref_clk),   -- MHz
+    -- minimum pulse in ns to accept input (must be >1 clk_i ns)
+    g_min_pulse_width                       => 8,
    g_clk_frequency                         => 250,   -- MHz
    g_output_polarity                       => '0',   -- positive pulse
    g_output_retrig                         => false,

--- a/hdl/modules/dbe_wishbone/wb_fmc516/wb_fmc516.vhd
+++ b/hdl/modules/dbe_wishbone/wb_fmc516/wb_fmc516.vhd
@@ -1485,7 +1485,7 @@ begin
  -- Trigger buffers and Synchronization
  cmp_ext_trig_ibufds : ibufds
  generic map(
-    IOSTANDARD                               => "LVDS_25",
+    IOSTANDARD                            => "LVDS_25",
    DIFF_TERM                             => TRUE
  )
  port map (
@@ -1497,8 +1497,9 @@ begin
  -- External hardware trigger synchronization
  cmp_trig_sync : gc_ext_pulse_sync
  generic map(
-    g_min_pulse_width                       => 1,     -- clk_i ticks
-    g_clk_frequency                         => 100,   -- MHz
+    -- minimum pulse in ns to accept input (must be >1 clk_i ns)
+    g_min_pulse_width                       => 8,
+    g_clk_frequency                         => 250,   -- MHz
    g_output_polarity                       => '0',   -- positive pulse
    g_output_retrig                         => false,
    g_output_length                         => 1      -- clk_i tick