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FMC ADC 100M 14b 4cha - Gateware
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FMC ADC 100M 14b 4cha - Gateware
Commits
4c3d5acd
Commit
4c3d5acd
authored
Nov 21, 2018
by
Dimitris Lampridis
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drive unused wb signal outputs to zero
parent
f98f833b
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2 changed files
with
12 additions
and
18 deletions
+12
-18
fmc_adc_100Ms_core.vhd
hdl/rtl/fmc_adc_100Ms_core.vhd
+8
-7
fmc_adc_100Ms_core_pkg.vhd
hdl/rtl/fmc_adc_100Ms_core_pkg.vhd
+4
-11
No files found.
hdl/rtl/fmc_adc_100Ms_core.vhd
View file @
4c3d5acd
...
...
@@ -40,11 +40,10 @@ use work.wishbone_pkg.all;
use
work
.
fmc_adc_100Ms_csr_wbgen2_pkg
.
all
;
entity
fmc_adc_100Ms_core
is
generic
(
generic
(
g_MULTISHOT_RAM_SIZE
:
natural
:
=
2048
;
g_WB_CSR_MODE
:
t_wishbone_interface_mode
:
=
PIPELINED
;
g_WB_CSR_GRANULARITY
:
t_wishbone_address_granularity
:
=
BYTE
);
g_WB_CSR_GRANULARITY
:
t_wishbone_address_granularity
:
=
BYTE
);
port
(
-- Clock, reset
sys_clk_i
:
in
std_logic
;
...
...
@@ -93,14 +92,12 @@ entity fmc_adc_100Ms_core is
gpio_ssr_ch2_o
:
out
std_logic_vector
(
6
downto
0
);
-- Channel 2 solid state relays control
gpio_ssr_ch3_o
:
out
std_logic_vector
(
6
downto
0
);
-- Channel 3 solid state relays control
gpio_ssr_ch4_o
:
out
std_logic_vector
(
6
downto
0
);
-- Channel 4 solid state relays control
gpio_si570_oe_o
:
out
std_logic
-- Si570 (programmable oscillator) output enable
);
end
fmc_adc_100Ms_core
;
gpio_si570_oe_o
:
out
std_logic
);
-- Si570 (programmable oscillator) output enable
end
fmc_adc_100Ms_core
;
architecture
rtl
of
fmc_adc_100Ms_core
is
------------------------------------------------------------------------------
-- Components declaration
------------------------------------------------------------------------------
...
...
@@ -659,6 +656,10 @@ begin
regs_i
=>
csr_regin
,
regs_o
=>
csr_regout
);
-- drive unused wb outputs
wb_csr_out
.
err
<=
'0'
;
wb_csr_out
.
rty
<=
'0'
;
csr_regin
.
sta_fsm_i
<=
acq_fsm_state
;
csr_regin
.
sta_serdes_pll_i
<=
locked_out
;
csr_regin
.
sta_serdes_synced_i
<=
serdes_synced
;
...
...
hdl/rtl/fmc_adc_100Ms_core_pkg.vhd
View file @
4c3d5acd
...
...
@@ -49,11 +49,10 @@ package fmc_adc_100Ms_core_pkg is
-- Components declaration
------------------------------------------------------------------------------
component
fmc_adc_100Ms_core
generic
(
generic
(
g_MULTISHOT_RAM_SIZE
:
natural
:
=
2048
;
g_WB_CSR_MODE
:
t_wishbone_interface_mode
:
=
PIPELINED
;
g_WB_CSR_GRANULARITY
:
t_wishbone_address_granularity
:
=
BYTE
);
g_WB_CSR_GRANULARITY
:
t_wishbone_address_granularity
:
=
BYTE
);
port
(
-- Clock, reset
sys_clk_i
:
in
std_logic
;
...
...
@@ -102,14 +101,8 @@ package fmc_adc_100Ms_core_pkg is
gpio_ssr_ch2_o
:
out
std_logic_vector
(
6
downto
0
);
-- Channel 2 solid state relays control
gpio_ssr_ch3_o
:
out
std_logic_vector
(
6
downto
0
);
-- Channel 3 solid state relays control
gpio_ssr_ch4_o
:
out
std_logic_vector
(
6
downto
0
);
-- Channel 4 solid state relays control
gpio_si570_oe_o
:
out
std_logic
-- Si570 (programmable oscillator) output enable
);
end
component
fmc_adc_100Ms_core
;
end
fmc_adc_100Ms_core_pkg
;
package
body
fmc_adc_100Ms_core_pkg
is
gpio_si570_oe_o
:
out
std_logic
);
-- Si570 (programmable oscillator) output enable
end
component
fmc_adc_100Ms_core
;
end
fmc_adc_100Ms_core_pkg
;
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