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F
FMC ADC 100M 14b 4cha - Gateware
Commit c1b687f7 authored by Dimitris Lampridis's avatar Dimitris Lampridis
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Bugfix: ADC serial clock period should be 2.5ns. Closes #1739

parent 182f982f
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hdl/spec/spec_top_fmc_adc_100Ms.ucf
View file @ c1b687f7
......@@ -578,7 +578,7 @@ TIMESPEC TS_clk_125m_pllref_n_i = PERIOD "clk_125m_pllref_n_i" 8 ns HIGH 50%;
# ADC
NET "adc0_dco_n_i" TNM_NET = adc_dco_n_i;
TIMESPEC TS_adc_dco_n_i = PERIOD "adc_dco_n_i" 2 ns HIGH 50%;
TIMESPEC TS_adc_dco_n_i = PERIOD "adc_dco_n_i" 2.5 ns HIGH 50%;
#===============================================================================
# False Path
......
hdl/svec/svec_top_fmc_adc_100Ms.ucf
View file @ c1b687f7
......@@ -912,9 +912,9 @@ TIMESPEC TS_clk_125m_pllref_n_i = PERIOD "clk_125m_pllref_n_i" 8 ns HIGH 50%;
# ADC
NET "adc0_dco_n_i" TNM_NET = adc0_dco_n_i;
TIMESPEC TS_adc0_dco_n_i = PERIOD "adc0_dco_n_i" 2 ns HIGH 50%;
TIMESPEC TS_adc0_dco_n_i = PERIOD "adc0_dco_n_i" 2.5 ns HIGH 50%;
NET "adc1_dco_n_i" TNM_NET = adc1_dco_n_i;
TIMESPEC TS_adc1_dco_n_i = PERIOD "adc1_dco_n_i" 2 ns HIGH 50%;
TIMESPEC TS_adc1_dco_n_i = PERIOD "adc1_dco_n_i" 2.5 ns HIGH 50%;
#===============================================================================
# IOBs
......
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