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FMC ADC 100M 14b 4cha - Gateware
Commit f98f833b authored by Dimitris Lampridis's avatar Dimitris Lampridis
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hdl: expose acq config status bit

parent 1ecef9a7
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Showing with 14 additions and 2 deletions
hdl/rtl/fmc_adc_100Ms_core.vhd
View file @ f98f833b
...@@ -60,6 +60,9 @@ entity fmc_adc_100Ms_core is ...@@ -60,6 +60,9 @@ entity fmc_adc_100Ms_core is
wb_ddr_master_i : in t_wishbone_master_data64_in; wb_ddr_master_i : in t_wishbone_master_data64_in;
wb_ddr_master_o : out t_wishbone_master_data64_out; wb_ddr_master_o : out t_wishbone_master_data64_out;
-- Acquisition configuration status flag
acq_cfg_ok_o : out std_logic;
-- Events output pulses -- Events output pulses
trigger_p_o : out std_logic; trigger_p_o : out std_logic;
acq_start_p_o : out std_logic; acq_start_p_o : out std_logic;
...@@ -1267,6 +1270,8 @@ begin ...@@ -1267,6 +1270,8 @@ begin
end if; end if;
end process p_acq_cfg_ok; end process p_acq_cfg_ok;
acq_cfg_ok_o <= acq_config_ok;
-- FSM transitions -- FSM transitions
p_acq_fsm_transitions : process(sys_clk_i) p_acq_fsm_transitions : process(sys_clk_i)
begin begin
......
hdl/rtl/fmc_adc_100Ms_core_pkg.vhd
View file @ f98f833b
...@@ -69,6 +69,9 @@ package fmc_adc_100Ms_core_pkg is ...@@ -69,6 +69,9 @@ package fmc_adc_100Ms_core_pkg is
wb_ddr_master_i : in t_wishbone_master_data64_in; wb_ddr_master_i : in t_wishbone_master_data64_in;
wb_ddr_master_o : out t_wishbone_master_data64_out; wb_ddr_master_o : out t_wishbone_master_data64_out;
-- Acquisition configuration status flag
acq_cfg_ok_o : out std_logic;
-- Events output pulses -- Events output pulses
trigger_p_o : out std_logic; trigger_p_o : out std_logic;
acq_start_p_o : out std_logic; acq_start_p_o : out std_logic;
......
hdl/rtl/fmc_adc_mezzanine.vhd
View file @ f98f833b
...@@ -56,11 +56,12 @@ entity fmc_adc_mezzanine is ...@@ -56,11 +56,12 @@ entity fmc_adc_mezzanine is
wb_ddr_master_i : in t_wishbone_master_data64_in; wb_ddr_master_i : in t_wishbone_master_data64_in;
wb_ddr_master_o : out t_wishbone_master_data64_out; wb_ddr_master_o : out t_wishbone_master_data64_out;
-- Interrupts -- Interrupts and status
ddr_wr_fifo_empty_i : in std_logic; ddr_wr_fifo_empty_i : in std_logic;
trig_irq_o : out std_logic; trig_irq_o : out std_logic;
acq_end_irq_o : out std_logic; acq_end_irq_o : out std_logic;
eic_irq_o : out std_logic; eic_irq_o : out std_logic;
acq_cfg_ok_o : out std_logic;
-- FMC interface -- FMC interface
ext_trigger_p_i : in std_logic; -- External trigger ext_trigger_p_i : in std_logic; -- External trigger
...@@ -413,6 +414,8 @@ begin ...@@ -413,6 +414,8 @@ begin
wb_ddr_master_o => wb_ddr_master_o, wb_ddr_master_o => wb_ddr_master_o,
wb_ddr_master_i => wb_ddr_master_i, wb_ddr_master_i => wb_ddr_master_i,
acq_cfg_ok_o => acq_cfg_ok_o,
trigger_p_o => trigger_p, trigger_p_o => trigger_p,
acq_start_p_o => acq_start_p, acq_start_p_o => acq_start_p,
acq_stop_p_o => acq_stop_p, acq_stop_p_o => acq_stop_p,
......
hdl/rtl/fmc_adc_mezzanine_pkg.vhd
View file @ f98f833b
...@@ -61,11 +61,12 @@ package fmc_adc_mezzanine_pkg is ...@@ -61,11 +61,12 @@ package fmc_adc_mezzanine_pkg is
wb_ddr_master_i : in t_wishbone_master_data64_in; wb_ddr_master_i : in t_wishbone_master_data64_in;
wb_ddr_master_o : out t_wishbone_master_data64_out; wb_ddr_master_o : out t_wishbone_master_data64_out;
-- Interrupt -- Interrupt and status
ddr_wr_fifo_empty_i : in std_logic; ddr_wr_fifo_empty_i : in std_logic;
trig_irq_o : out std_logic; trig_irq_o : out std_logic;
acq_end_irq_o : out std_logic; acq_end_irq_o : out std_logic;
eic_irq_o : out std_logic; eic_irq_o : out std_logic;
acq_cfg_ok_o : out std_logic;
-- FMC interface -- FMC interface
ext_trigger_p_i : in std_logic; -- External trigger ext_trigger_p_i : in std_logic; -- External trigger
......
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