Power Supplies
Vita 57 specifies that any FMC carrier should provide with +3V3@3A, +12V@1A and VADJ (0 to +3V3)@2A connected to FPGA VCCIO and to the mezzanine. The PFC functional specification additionally states that the PFC should be able to provide +5V, -2V, -5V2 and -12V to the FMC slot. As the power provided by the PCIe slot can be eiter 10W, 25W or 75W, the maximum current provided by these extra supplies was left unspecified. It is rather the user who should monitor the current consumed by the FMC and carrier.
The power supply architecture is based on two LTM4616 switching regulators with a maximum load of 4A per channel. One generates +3V3 and VADJ for the FMC; a second one generates +5V and +1V8. The PCIe +3V3 is used to power most of the 3V3 logic. Sensitive devices, such as the PLLs, are powered with dedicated linear regulators. The FMC +12V is connected directly to the PCIe +12V. Notice that PCIe +12V has a greater tolerance (8%) than the FMC +12V (%5), therefore connecting directly both supplies goes against the Vita 57 specification. We have considered that the effort to regenerate on board a more stable +12V does not compensate the increased +12V accuracy.
Negative power supplies -2V, -5V2 and -12V are generated with 3 LTM8025.
You can find a detailed power tree here:
Power supplies tree
[pdf]
Not updated
An overview of the architecture and an estimation of worst case power
consumption can be found in:
Power supplies consumption
[pdf]
-- PabloAlvarez - 10 Dec 2009
-- PabloAlvarez - 26 May 2010
-- PabloAlvarez - 20 Sept 2010