softpll: synchronize slave channel DDMTD counter before starting MPLL (fixes reversed DMTD locking issues)

softpll: track only lower half of the ports (speed reasons, FIXME), added shifter busy call, fixed PPS output enable in GM/FreeMaster modes

softpll: bugfixes: drive DAC to constant value when out-of-lock or master, ptracker channel order and phase range check fix

softpll: single entry point to rule them all (GM, master, slave modes), fully non-blocking operation

Conflicts:

	rt/dev/softpll_ng.c

Conflicts:

	rt/dev/softpll_ng.c

Conflicts:

	rt/dev/softpll_ng.c

Conflicts:

	modules/wrsw_rtu/rtu_wishbone_slave.vhd