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VME64x core
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VME64x core
Commits
02a397d1
Commit
02a397d1
authored
Dec 20, 2022
by
Sebastian Owarzany
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hdl/rtl/xvme64x_core.vhd | hdl/rtl/vme64x_core_verilog.vhd add default return for functions
parent
fbd7dbbf
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2 changed files
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6 additions
and
3 deletions
+6
-3
vme64x_core_verilog.vhd
hdl/rtl/vme64x_core_verilog.vhd
+4
-1
xvme64x_core.vhd
hdl/rtl/xvme64x_core.vhd
+2
-2
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hdl/rtl/vme64x_core_verilog.vhd
View file @
02a397d1
...
...
@@ -111,7 +111,7 @@ entity vme64x_core_verilog is
user_csr_we_o
:
out
std_logic
;
user_cr_addr_o
:
out
std_logic_vector
(
18
downto
2
);
user_cr_data_i
:
std_logic_vector
(
7
downto
0
)
:
=
(
others
=>
'0'
));
function
nat_to_bool
(
X
:
natural
)
return
boolean
is
begin
...
...
@@ -131,7 +131,9 @@ entity vme64x_core_verilog is
if
X
=
"BYTE"
then
return
BYTE
;
end
if
;
return
BYTE
;
end
string_to_wb_grn
;
function
string_to_wb_mode
(
X
:
string
)
return
t_wishbone_interface_mode
is
begin
...
...
@@ -141,6 +143,7 @@ entity vme64x_core_verilog is
if
X
=
"PIPELINED"
then
return
PIPELINED
;
end
if
;
return
PIPELINED
;
end
string_to_wb_mode
;
end
vme64x_core_verilog
;
...
...
hdl/rtl/xvme64x_core.vhd
View file @
02a397d1
...
...
@@ -120,7 +120,6 @@ entity xvme64x_core is
g_END_SN
:
std_logic_vector
(
23
downto
0
)
:
=
x"000000"
;
g_USE_CUSTOM_ADER
:
Boolean
:
=
false
;
-- Function decoder parameters.
g_DECODER
:
t_vme64x_decoder_arr
:
=
c_vme64x_decoders_default
);
port
(
...
...
@@ -149,7 +148,7 @@ entity xvme64x_core is
irq_ack_o
:
out
std_logic
;
ader_i
:
in
t_ader_array
(
0
to
7
)
:
=
c_default_ader_array
;
-- User CSR
-- The following signals are used when g_USER_CSR_EXT = true
-- otherwise they are connected to the internal user CSR.
...
...
@@ -192,6 +191,7 @@ architecture rtl of xvme64x_core is
return
i
;
end
if
;
end
loop
;
return
0
;
end
least_set_bit
;
-- Compute the ADER for each function if CR/CSR is not used. For example:
...
...
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