Past due
Milestone
expired on May 15, 2020
Schematic done
When the schematic is complete, reviewed and delivered to DEM
All issues for this milestone are closed. You may close this milestone now.
Unstarted Issues (open and unassigned)
0
Ongoing Issues (open and assigned)
0
Completed Issues (closed)
42
- Replace ADCLK925 with LTC6957-2
- Missing correct symbols in rf_main sheet
- DAC clock - AC coupling
- pulse shaper - vcc connected to vin
- Replace capacitors and inductors with proper symbols in RF main sheet
- Verify that the BE-RF VME crate power supplies can deliver enough current on P1
- IRLML2803PBF must be replaced with PMV40UN2R
- Use separate FPGA pins for the two WR EEPROMs
- delay line for TU
- Power sequencing and consumption
- Dielectric of ceramic capacitors in the RF path
- DC coupling for FPGA clock ECL to LVDS
- Trigger unit output glitches
- FPGA configuration IO
- Front panel Timing I/O
- Faster buffers for front panel I/O
- Optimise BOM
- RF amplifier checked?
- Check terminations on shared SPI lines
- Change licence to CERN-OHL-S v2
- Consider serial termination on the LEN pin of the 100EP195 delay line
- wire length matching
- consider using an INA240 for the OCXO current sense
- Address switch
- Name change for NETs: CLK_FPGA_62M5_p and CLK_FPGA_62M5_p
- Series resistors and buffers on VME P0 TTL lines
- Fix Altium warning regarding IO and power pins on GND
- could remove VME_A_DIR and VME_LWORD_N
- Unify and update fields in sheet templates
- Should RF trigger driver be powered from P3V3A?
- Check DDS IOUPDATE signal FPGA connection
- Main RF generation
- 1V0 LDO current sharing scheme - questions
- Front panel connections
- RF trigger output
- pulse shaper - questions
- Inconsistent pull-down for VME_RETRY_OE and VME_A_OE_N
- Are we ok with 128Mbit flash?
- Is current power sequencing adequate?
- BOM de de-optimization
- incorrect note about LTC5598IUF#PBF
- VME connector issues