- 03 May, 2019 17 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 29 Apr, 2019 7 commits
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Federico Vaga authored
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Federico Vaga authored
- firmware building system has changed - some header files have been changed Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
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Dimitris Lampridis authored
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Dimitris Lampridis authored
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Federico Vaga authored
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- 26 Apr, 2019 2 commits
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Dimitris Lampridis authored
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Dimitris Lampridis authored
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- 12 Apr, 2019 5 commits
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Dimitris Lampridis authored
sim: fix broken spec_mt_demo simulation due to uninitialized signals in dual async fifos from general-cores
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Dimitris Lampridis authored
hdl: use updated gennum core and modified synthesis options in order to solve timing problems with spec_mt_demo
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Dimitris Lampridis authored
"bram" files are used in order to produce FPGA bitstreams with the MT CPUs preprogrammed with their firmware. Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch> Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 11 Apr, 2019 4 commits
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Dimitris Lampridis authored
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Dimitris Lampridis authored
Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
"bram" files are used in order to produce FPGA bitstreams with the MT CPUs preprogrammed with their firmware.
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Dimitris Lampridis authored
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- 08 Apr, 2019 2 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 05 Apr, 2019 1 commit
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Federico Vaga authored
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- 04 Apr, 2019 2 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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