Major cleanup of VHDL code

Signed-off-by: Tom Levens <tom.levens@cern.ch>

Major cleanup of VHDL code
Signed-off-by: Tom Levens <tom.levens@cern.ch>
af4ec2d0 · Tom Levens · ae18039d · af4ec2d0 · af4ec2d0 · af4ec2d0
Commit af4ec2d0 authored Jan 04, 2017 by Tom Levens
17 changed files
--- a/hdl/vme64x-core/rtl/VME64xCore_Top.vhd
+++ b/hdl/vme64x-core/rtl/VME64xCore_Top.vhd
--- a/hdl/vme64x-core/rtl/VME_Access_Decode.vhd
+++ b/hdl/vme64x-core/rtl/VME_Access_Decode.vhd
--- a/hdl/vme64x-core/rtl/VME_Am_Match.vhd
+++ b/hdl/vme64x-core/rtl/VME_Am_Match.vhd
--- a/hdl/vme64x-core/rtl/VME_CRAM.vhd
+++ b/hdl/vme64x-core/rtl/VME_CRAM.vhd
--______________________________________________________________________________|
+--------------------------------------------------------------------------------
--                             VME TO WB INTERFACE                              |
+-- CERN (BE-CO-HT)
--                                                                              |
+-- VME64x Core
--                                CERN,BE/CO-HT                                 |
+-- http://www.ohwr.org/projects/vme64x-core
--______________________________________________________________________________|
+--------------------------------------------------------------------------------
-- File:                        VME_CRAM.vhd                                  |
+--
--______________________________________________________________________________|
+-- unit name:     VME_CRAM (VME_CRAM.vhd)
-- Description: RAM memory
+--
--______________________________________________________________________________
+-- author:        Pablo Alvarez Sanchez <pablo.alvarez.sanchez@cern.ch>
-- Authors:                                      
+--                Davide Pedretti       <davide.pedretti@cern.ch>
--               Pablo Alvarez Sanchez (Pablo.Alvarez.Sanchez@cern.ch)                             
+--
--               Davide Pedretti       (Davide.Pedretti@cern.ch)  
+-- description:   RAM memory
-- Date         11/2012                                                                           
+--
-- Version      v0.03  
+-- dependencies:
--______________________________________________________________________________
+--
--                               GNU LESSER GENERAL PUBLIC LICENSE                                
+--------------------------------------------------------------------------------
--                              ------------------------------------    
+-- GNU LESSER GENERAL PUBLIC LICENSE
-- Copyright (c) 2009 - 2011 CERN                           
+--------------------------------------------------------------------------------
-- This source file is free software; you can redistribute it and/or modify it under the terms of 
+-- This source file is free software; you can redistribute it and/or modify it
-- the GNU Lesser General Public License as published by the Free Software Foundation; either     
+-- under the terms of the GNU Lesser General Public License as published by the
-- version 2.1 of the License, or (at your option) any later version.                             
+-- Free Software Foundation; either version 2.1 of the License, or (at your
-- This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;       
+-- option) any later version. This source is distributed in the hope that it
-- without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.     
+-- will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty
-- See the GNU Lesser General Public License for more details.                                    
+-- of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-- You should have received a copy of the GNU Lesser General Public License along with this       
+-- See the GNU Lesser General Public License for more details. You should have
-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html                     
+-- received a copy of the GNU Lesser General Public License along with this
---------------------------------------------------------------------------------------
+-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
+--------------------------------------------------------------------------------
+-- last changes: see log.
+--------------------------------------------------------------------------------
+-- TODO: -
+--------------------------------------------------------------------------------
-library IEEE;
+library ieee;
-use IEEE.STD_LOGIC_1164.ALL;
+use ieee.std_logic_1164.all;
-use IEEE.STD_LOGIC_ARITH.ALL;
+use ieee.numeric_std.all;
-use IEEE.STD_LOGIC_UNSIGNED.ALL;
 use work.vme64x_pack.all;
--===========================================================================
-- Entity declaration
--===========================================================================
- entity VME_CRAM is
- generic (dl : integer; 		
- 			 al : integer := f_log2_size(c_CRAM_SIZE) 		
-			 );    
- port (clk  : in std_logic; 			
- 	we   : in std_logic; 				
- 	aw    : in std_logic_vector(al - 1 downto 0); 	 
- 	di   : in std_logic_vector(dl - 1 downto 0); 
- 	dw  : out std_logic_vector(dl - 1 downto 0)
-	);   	 
- end VME_CRAM; 
--===========================================================================
-- Architecture declaration
--===========================================================================
- architecture syn of VME_CRAM is 
- type ram_type is array (2**al - 1 downto 0) of std_logic_vector (dl - 1 downto 0); 
- signal CRAM : ram_type; 
--===========================================================================
+entity VME_CRAM is
-- Architecture begin
+  generic (
--===========================================================================
+    dl : integer;
-begin 
+    al : integer := f_log2_size(c_CRAM_SIZE)
+  );
+  port (
+    clk : in  std_logic;
+    we  : in  std_logic;
+    aw  : in  std_logic_vector(al-1 downto 0);
+    di  : in  std_logic_vector(dl-1 downto 0);
+    dw  : out std_logic_vector(dl-1 downto 0)
+  );
+end VME_CRAM;
- process (clk) 
+architecture syn of VME_CRAM is
- begin 
- 	if (clk'event and clk = '1') then  
+  type ram_type is array (2**al-1 downto 0) of std_logic_vector (dl-1 downto 0);
- 		if (we = '1') then 
+  signal CRAM : ram_type;
- 			CRAM(conv_integer(aw)) <= di; 
- 		end if; 
+begin
-		dw <= CRAM(conv_integer(aw));
- 	end if; 
+  process (clk) begin
- end process; 
+    if rising_edge(clk) then
+      if (we = '1') then
- end syn;
+        CRAM(to_integer(unsigned(aw))) <= di;
--===========================================================================
+      end if;
-- Architecture end
+      dw <= CRAM(to_integer(unsigned(aw)));
--===========================================================================
+    end if;
+  end process;
+end syn;
--- a/hdl/vme64x-core/rtl/VME_CR_CSR_Space.vhd
+++ b/hdl/vme64x-core/rtl/VME_CR_CSR_Space.vhd
--- a/hdl/vme64x-core/rtl/VME_CR_pack.vhd
+++ b/hdl/vme64x-core/rtl/VME_CR_pack.vhd
--- a/hdl/vme64x-core/rtl/VME_CSR_pack.vhd
+++ b/hdl/vme64x-core/rtl/VME_CSR_pack.vhd
--________________________________________________________________________________________________
+--------------------------------------------------------------------------------
--                             VME TO WB INTERFACE
+-- CERN (BE-CO-HT)
+-- VME64x Core
+-- http://www.ohwr.org/projects/vme64x-core
+--------------------------------------------------------------------------------
 --
--                                CERN,BE/CO-HT 
+-- unit name:     VME_CSR_pack (VME_CSR_pack.vhd)
--________________________________________________________________________________________________
+--
-- File:                         VME_CSR_pack.vhd
+-- author:        Pablo Alvarez Sanchez <pablo.alvarez.sanchez@cern.ch>
--________________________________________________________________________________________________
+--                Davide Pedretti       <davide.pedretti@cern.ch>
-- Description: This file defines the default configuration of the CSR space after power-up or 
+--
-- software reset.
+-- description:   This file defines the default configuration of the CSR space
--______________________________________________________________________________
+--                after power-up or software reset.
-- Authors:                                      
+--
--               Pablo Alvarez Sanchez (Pablo.Alvarez.Sanchez@cern.ch)                             
+-- dependencies:
--               Davide Pedretti       (Davide.Pedretti@cern.ch)  
+--
-- Date         06/2012                                                                           
+--------------------------------------------------------------------------------
-- Version      v0.02  
+-- GNU LESSER GENERAL PUBLIC LICENSE
--______________________________________________________________________________
+--------------------------------------------------------------------------------
--                               GNU LESSER GENERAL PUBLIC LICENSE                                
+-- This source file is free software; you can redistribute it and/or modify it
--                              ------------------------------------    
+-- under the terms of the GNU Lesser General Public License as published by the
-- Copyright (c) 2009 - 2011 CERN                           
+-- Free Software Foundation; either version 2.1 of the License, or (at your
-- This source file is free software; you can redistribute it and/or modify it 
+-- option) any later version. This source is distributed in the hope that it
-- under the terms of the GNU Lesser General Public License as published by the 
+-- will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty
-- Free Software Foundation; either version 2.1 of the License, or (at your option) 
+-- of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-- any later version. This source is distributed in the hope that it will be useful, 
+-- See the GNU Lesser General Public License for more details. You should have
-- but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 
+-- received a copy of the GNU Lesser General Public License along with this
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for 
+-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
-- more details. You should have received a copy of the GNU Lesser General Public 
+--------------------------------------------------------------------------------
-- License along with this source; if not, download it from 
+-- last changes: see log.
-- http://www.gnu.org/licenses/lgpl-2.1.html                     
+--------------------------------------------------------------------------------
----------------------------------------------------------------------------------
+-- TODO: -
+--------------------------------------------------------------------------------
-library IEEE;
-use IEEE.STD_LOGIC_1164.all;
+library ieee;
-use IEEE.numeric_std.all;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
 use work.vme64x_pack.all;
-package VME_CSR_pack is
-constant c_csr_array : 	t_CSRarray :=
-(
-BAR  => x"00", --CR/CSR BAR
-BIT_SET_CLR_REG  => x"00", --Bit set register -- 0x10=module enable
-USR_BIT_SET_CLR_REG  => x"00", --Bit clear register
-CRAM_OWNER  => x"00", --CRAM_OWNER
-FUNC0_ADER_0 =>x"00",  --A32_S   "24"
-FUNC0_ADER_1 =>x"00",  --        "00"
-FUNC0_ADER_2 =>x"00",  --        "00"
-FUNC0_ADER_3 =>x"00",  --        "c0"
-FUNC1_ADER_0 =>x"00",  --A24_S   "e4"
-FUNC1_ADER_1 =>x"00",  --        "00"
-FUNC1_ADER_2 =>x"00",  --        "c0" 
-FUNC1_ADER_3 =>x"00",  --        "00"  
-FUNC2_ADER_0 =>x"00",   --A16_S  "a4"
-FUNC2_ADER_1 =>x"00",  --        "c0"
-FUNC2_ADER_2 =>x"00",  --        "00"
-FUNC2_ADER_3 =>x"00",  --        "00"
-FUNC3_ADER_0 =>x"00",   --A64_S  "04"
-FUNC3_ADER_1 =>x"00",
-FUNC3_ADER_2 =>x"00",
-FUNC3_ADER_3 =>x"00",
-FUNC4_ADER_0 =>x"00",   --used for decoding the FUNC3
-FUNC4_ADER_1 =>x"00",   --used for decoding the FUNC3
-FUNC4_ADER_2 =>x"00",   --used for decoding the FUNC3
-FUNC4_ADER_3 =>x"00",   --used for decoding the FUNC3 "c0"
-FUNC5_ADER_0 =>x"00",
-FUNC5_ADER_1 =>x"00",
-FUNC5_ADER_2 =>x"00",
-FUNC5_ADER_3 =>x"00",
-FUNC6_ADER_0 =>x"00",
-FUNC6_ADER_1 =>x"00",
-FUNC6_ADER_2 =>x"00",
-FUNC6_ADER_3 =>x"00",
-IRQ_Vector   =>x"00",  --"00" because each Slot has a different IRQ Vector
-                       -- and the VME Master should set this value
-IRQ_level    =>x"02",
-WB32bits     =>x"01",  -- 32 bit WB of default
-others => (others => '0'));
-end VME_CSR_pack;                                                                
+package VME_CSR_pack is
+  constant c_csr_array : t_CSRarray := (
+    BAR                 => x"00",  -- CR/CSR BAR
+    BIT_SET_CLR_REG     => x"00",  -- Bit set register
+                                   -- 0x10 = module enable
+    USR_BIT_SET_CLR_REG => x"00",  -- Bit clear register
+    CRAM_OWNER          => x"00",  -- CRAM_OWNER
+    FUNC0_ADER_0        => x"00",  -- A32_S  "24"
+    FUNC0_ADER_1        => x"00",  --        "00"
+    FUNC0_ADER_2        => x"00",  --        "00"
+    FUNC0_ADER_3        => x"00",  --        "c0"
+    FUNC1_ADER_0        => x"00",  -- A24_S  "e4"
+    FUNC1_ADER_1        => x"00",  --        "00"
+    FUNC1_ADER_2        => x"00",  --        "c0"
+    FUNC1_ADER_3        => x"00",  --        "00"
+    FUNC2_ADER_0        => x"00",  -- A16_S  "a4"
+    FUNC2_ADER_1        => x"00",  --        "c0"
+    FUNC2_ADER_2        => x"00",  --        "00"
+    FUNC2_ADER_3        => x"00",  --        "00"
+    FUNC3_ADER_0        => x"00",  -- A64_S  "04"
+    FUNC3_ADER_1        => x"00",
+    FUNC3_ADER_2        => x"00",
+    FUNC3_ADER_3        => x"00",
+    FUNC4_ADER_0        => x"00",  -- used for decoding the FUNC3
+    FUNC4_ADER_1        => x"00",  -- used for decoding the FUNC3
+    FUNC4_ADER_2        => x"00",  -- used for decoding the FUNC3
+    FUNC4_ADER_3        => x"00",  -- used for decoding the FUNC3 "c0"
+    FUNC5_ADER_0        => x"00",
+    FUNC5_ADER_1        => x"00",
+    FUNC5_ADER_2        => x"00",
+    FUNC5_ADER_3        => x"00",
+    FUNC6_ADER_0        => x"00",
+    FUNC6_ADER_1        => x"00",
+    FUNC6_ADER_2        => x"00",
+    FUNC6_ADER_3        => x"00",
+    IRQ_Vector          => x"00",  -- "00" because each Slot has a different IRQ Vector
+                                   -- and the VME Master should set this value
+    IRQ_level           => x"02",
+    WB32bits            => x"01",  -- 32 bit WB of default
+    others              => (others => '0')
+  );
+end VME_CSR_pack;
--- a/hdl/vme64x-core/rtl/VME_Funct_Match.vhd
+++ b/hdl/vme64x-core/rtl/VME_Funct_Match.vhd
--- a/hdl/vme64x-core/rtl/VME_IRQ_Controller.vhd
+++ b/hdl/vme64x-core/rtl/VME_IRQ_Controller.vhd
--- a/hdl/vme64x-core/rtl/VME_Init.vhd
+++ b/hdl/vme64x-core/rtl/VME_Init.vhd
--- a/hdl/vme64x-core/rtl/VME_SharedComps.vhd
+++ b/hdl/vme64x-core/rtl/VME_SharedComps.vhd
--- a/hdl/vme64x-core/rtl/VME_Wb_master.vhd
+++ b/hdl/vme64x-core/rtl/VME_Wb_master.vhd
--- a/hdl/vme64x-core/rtl/VME_bus.vhd
+++ b/hdl/vme64x-core/rtl/VME_bus.vhd
--- a/hdl/vme64x-core/rtl/VME_swapper.vhd
+++ b/hdl/vme64x-core/rtl/VME_swapper.vhd
--- a/hdl/vme64x-core/rtl/vme64x_pack.vhd
+++ b/hdl/vme64x-core/rtl/vme64x_pack.vhd
--- a/hdl/vme64x-core/rtl/xvme64x_core.vhd
+++ b/hdl/vme64x-core/rtl/xvme64x_core.vhd
--- a/hdl/vme64x-core/rtl/xvme64x_core_pkg.vhd
+++ b/hdl/vme64x-core/rtl/xvme64x_core_pkg.vhd