changelog:
- changed layout and sequence numbering:
  * layout: ethernet header | timestamp | seq id | block 0 + CRC | 0xcafe + inter-frame seq_no| block 1...
  * the seq_no is per-frame, internally, there is internal sequencing, first
    block is considered 0 but has only seq_no, not sub-frame seq_no, the latter
    blocks have sub-frame seq_no
- added legacy generics
- debugged

The added code is based on the one provided for White Rabbit Core Hands-on
Training (http://www.ohwr.org/projects/wr-cores/wiki/Handson_training). The
code has been only adapted to
- fit the structure of wr-cores repository
- work with the newest wrpc-v3.0

Conflicts:
	ip_cores/general-cores

kintex-7 reference design updated such that it can do grand-master mode (putting the DIO card on the CLB FMC connector and inputting 10 MHz and PPS).

built from commit 5eeb579d in wrpc-sw repo

Otherwise we do twice the same write to memory and we permanently lose one
nrx_avail. This way, after some time minic may drop frames because it will think
its buffer has not enough space (based on nrx_avail value).

Not needed since the time we have a t24p measurement procedure.

Register stores new fields that were added to MCR since MDIO regs can be only
16-bits.

added delta delays in phy output signals to line up with the ch#_rx_rbclk_o assignment (purely necessary for proper simulation only)

when oob.valid, ep_tx_pcs_16bit should (just as ep_tx_psc_8bit) wait for the U_TX_FIFO to empty in order to catch the proper timestamp for the oob signalled packet.