- 21 Mar, 2017 1 commit
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Lucas Russo authored
dsp-cores added another generate statement, which chahge the hierarchy of position_calc component. So, we change it here.
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- 20 Mar, 2017 9 commits
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Lucas Russo authored
We can't include a prefix on registers filling the whole 32-bits. Otherwise wbgen generates MACROS for accessing this field that generally results in errors like: error: left shift count >= width of type [-Werror]
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Lucas Russo authored
Previously we were just assigning test values to them. Now, they are actually controlled by the fmcpico_1M.
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Lucas Russo authored
These are just controlled by Wishbone.
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Lucas Russo authored
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Lucas Russo authored
These contraints are not correct for PBPM as the CE for this board are 1 for TBT/FOFB and 8 for MONIT/MONIT1.
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Lucas Russo authored
This generic was recently added to the dsp-cores repository.
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Lucas Russo authored
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Lucas Russo authored
This is for safety until we export these signals to wishbone.
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Lucas Russo authored
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- 19 Mar, 2017 1 commit
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Lucas Russo authored
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- 18 Mar, 2017 1 commit
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Lucas Russo authored
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- 17 Mar, 2017 22 commits
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Lucas Russo authored
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Lucas Russo authored
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Lucas Russo authored
Using VHDL dor DDR core issues an error. No idea when that happens, unless re-target my project for Verilog and regenerate the DDR core.
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Lucas Russo authored
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Lucas Russo authored
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Lucas Russo authored
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Lucas Russo authored
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Lucas Russo authored
This is needed as dsp-cores changed xwb_position_calc_core interface.
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Lucas Russo authored
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Lucas Russo authored
This is a simple fix, just selecting a single channel to server as a valid reference.
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Lucas Russo authored
Now, we have the option to use a valid bit in the ACQ core for ADC that are very slow compared to the input clock frequency, such as the FMCPICO_1M. We are still missing position_calc_core ADC/ADCSWAP valid bits.
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Lucas Russo authored
We were instantiating the FMCPICO inside the FMC250 generate statement.
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Lucas Russo authored
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Lucas Russo authored
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Lucas Russo authored
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Lucas Russo authored
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Lucas Russo authored
This is just a commit fixing typos.
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Lucas Russo authored
This eases the addition of new ADCs with width larger than 16-bits, like the FMCPICO_1M.
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Lucas Russo authored
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Lucas Russo authored
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Lucas Russo authored
We were using this so to simplify the assignments in acquisition core, but this came with extra VHDL complexity. Better to leave as is and deal with this in software later.
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Lucas Russo authored
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- 16 Mar, 2017 6 commits
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Lucas Russo authored
To use the FMC2 EEPROM we must use the FMC1 I2C.
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Lucas Russo authored
Previously we were not sign-extending the FMCPICO_1M ADC bits, but zero-padding.
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Lucas Russo authored
These signals are connected through an external MUX. So, we must use the FMC1 ports to access the FMC2.
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Lucas Russo authored
The board supports from 1.8 to 3.3. So we are safe.
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Lucas Russo authored
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Lucas Russo authored
As a workaround we can finish the TCL constraint command with ";".
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