Commits · 258a3330e774890e1e72a2d77ffe39e6112aeacb · Projects / FMC ADC 100M 14b 4cha

10 Aug, 2011 5 commits

mcattin authored Aug 10, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@66 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

258a3330

Remove useless ise project files. · 8c514a73

mcattin authored Aug 10, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@65 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

8c514a73

Remove useless ise dir. · 11574347

mcattin authored Aug 10, 2011


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@64 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

11574347

Remove useless ise dir. · 39ea74b2

mcattin authored Aug 10, 2011


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@63 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

39ea74b2

Reorganise dirs. · 7577ea5e

mcattin authored Aug 10, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@62 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

7577ea5e

30 Jun, 2011 2 commits

Add top manifest and wbgen cores htm doc. · fa979408

mcattin authored Jun 30, 2011


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@60 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

fa979408

Commit before making the project hdl-make compliant. · ea07b855

mcattin authored Jun 30, 2011


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@59 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

ea07b855

20 Apr, 2011 1 commit

Modified ucf for SPEC V1.1 · 8802f990

mcattin authored Apr 20, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@58 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

8802f990

11 Apr, 2011 1 commit

Bug fix in pre/post trigger counters, was counting even if no valid data out of… · 1d3e6836

mcattin authored Apr 11, 2011

Bug fix in pre/post trigger counters, was counting even if no valid data out of sync fifo. Clear of WB cyc when FSm is IDLE

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@55 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

1d3e6836

01 Apr, 2011 1 commit

Work on multi-shots. · 490dbb38

mcattin authored Apr 01, 2011

Add a testing feature to write the address counter in ddr instead of the ADc data.
Add dpram ip for multi-shots.

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@54 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

490dbb38

31 Mar, 2011 1 commit

Add .bit and .bin to repo · 30438d13

mcattin authored Mar 31, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@53 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

30438d13

29 Mar, 2011 1 commit

Wishbone from adc core to ddr now 64-bit data width. · 51ef6665

mcattin authored Mar 29, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@52 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

51ef6665

24 Mar, 2011 1 commit

Add stall management in datapath wb interface. · 4d155222

mcattin authored Mar 24, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@51 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

4d155222

22 Mar, 2011 2 commits

Fix timing issues in spi by adding a FF on the din path. · d31b0d43
mcattin authored Mar 22, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@50 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
d31b0d43

Hold sys reset until sys clock pll is locked, LED monstable reset from sys… · 53345459

mcattin authored Mar 22, 2011

Hold sys reset until sys clock pll is locked, LED monstable reset from sys reset, add false path for ddr calib done in ucf.

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@49 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

53345459

21 Mar, 2011 2 commits

Bug fix in top (ddr ctrl wb addr width), if decimation is 0 -> no decimation · 9a8eb2b9
mcattin authored Mar 21, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@48 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
9a8eb2b9

ddr ctrl wb address in 32-bit words (instead of byte), adc data sync on fr_n… · ea1ddd6e

mcattin authored Mar 21, 2011

ddr ctrl wb address in 32-bit words (instead of byte), adc data sync on fr_n (due to inverted signal on adc fmc pcb).

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@47 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

ea1ddd6e

17 Mar, 2011 1 commit
- Modify acq fsm to avoid latch creation. Connect fsm state to csr. · ec0dc339
  mcattin authored Mar 17, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@46 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  ec0dc339
16 Mar, 2011 2 commits
- Connect ADC value registers directly to serdes output. · 8ce7c235
  mcattin authored Mar 16, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@45 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  8ce7c235
- Bug fix in serdes data reordering, add manual bitslip · d5592fa4
  mcattin authored Mar 16, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@44 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  d5592fa4
09 Mar, 2011 2 commits

Add wbgen slaves C header files. · 0b5d6966

mcattin authored Mar 09, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@43 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

0b5d6966

Fix timing issues. · 91268c4f

mcattin authored Mar 09, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@42 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

91268c4f

04 Mar, 2011 3 commits

Coding adc core. · 72c71b2c

mcattin authored Mar 04, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@41 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

72c71b2c

coding adc core · 140f08e1

mcattin authored Mar 04, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@40 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

140f08e1

coding adc core · 8f1bbe69

mcattin authored Mar 04, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@39 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

8f1bbe69

24 Feb, 2011 5 commits

Add design for SPEC board. · 01b7d9e2

mcattin authored Feb 24, 2011


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@38 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

01b7d9e2

fix dir struct mistake · e1666147

mcattin authored Feb 24, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@37 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

e1666147

Add hdl design for SPEC board. · 7abfd703

mcattin authored Feb 24, 2011


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@36 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

7abfd703

fix dir struct mistake · d7d2bf24

mcattin authored Feb 24, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@35 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

d7d2bf24

New dir struct and initial top design · b8854945

mcattin authored Feb 24, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@34 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

b8854945

02 Nov, 2010 1 commit

Fixed title of subsection 2.6.10. · d2f9c5f6

serrano authored Nov 02, 2010


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@29 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

d2f9c5f6

23 Sep, 2010 1 commit
- Suppressed UTC set register. Changed switch registers reset state. · 5be5c21e
  serrano authored Sep 23, 2010
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@28 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  5be5c21e
10 Sep, 2010 1 commit
- After a discussion with Stephane Deghaye. See Document History. · 43d53505
  serrano authored Sep 10, 2010
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@27 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  43d53505
08 Sep, 2010 1 commit

Regiter addresses and reset states added. · 5f454005

serrano authored Sep 08, 2010


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@26 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

5f454005

06 Sep, 2010 1 commit

Several changes after discussion with Pablo · 132ebbd9

serrano authored Sep 06, 2010


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@25 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

132ebbd9

25 Jul, 2010 1 commit
- Fairly major revision following comments from many people. · 081326e5
  serrano authored Jul 25, 2010
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@24 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  081326e5
19 May, 2010 1 commit

Modified diagram for clarity concerning DMA. · 8d5c9639

serrano authored May 19, 2010


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@23 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

8d5c9639

18 May, 2010 1 commit
- Clarified 32-bit read and write contraint only applies to control and status registers, not to DMA. · a37a5c69
  serrano authored May 18, 2010
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@22 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  a37a5c69
10 May, 2010 2 commits

Added DMA Error interrupt. · 4ef7220d

serrano authored May 10, 2010


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@21 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

4ef7220d

Address jump feature in chained DMA engine. TRIGPOSR description added. · 679c22da
serrano authored May 10, 2010
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@20 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
679c22da