- BTrain requires to set more parameters than just tx/rx_data_width
- it would be messy to have all the parameters in the top of each board
- I made a record with all tx/rx parameters and replaced the currently
  existing two generics that reach the top of svec/spec/vfchd_board
  with these record.
- Now, all the tx/rx parameters of tx/rx streamers can be set when
  using the "board" top
- Default constant is used with default values (defined ine streamers pkg)
- it is planed to have constant with default parameters for BTrain as well
  in the BTrain package. Possibly, the same policy can be used for other
  applications

- made the tx and rx streamer symmetric in terms of seeting the
  buffer size, now both have proper generics
- added proper descriptions
- added sanity checks for generics
- set (hopefully) more sensible defults

- corrected name of f_dbg_word_starting_at_byte (byte->bit)
- expanded description of g_rx_data_width
- added descriptions of g_rx_data_width and g_tx_data_width the info
  that they are required to be multiples of 16 bits

bin: modfied wrpc-sw for simulations to not perform SDB discovery, in order to speed-up simulation time

built from wrpc-sw using commit:
91ab423 sim main: disable discovery of peripherals via SDB to speed-up the simulation.

rx/tx streamers generics/ports

Set RCV_TERM_VTTRX to false. Now Rx Termination mode 2 is selected and active, as advised in ug386 for GbE

Tunable SFP WRT-SFPPT015SC caused trouble in the SPEC (Link Down). The receive amplitude is only 920 mVpp.
The Spartan6 PHY settings for Rx Termination were not conform any mode (see Xilinx UG386 Table 4-4 to 4-7).

Compiled from commit 180419ee of wrpc-sw repo.

We can finally do this with the fix:
2974805 - top/vfchd: disable external reference support

Currently external reference channel doesn't work on vfc-hd, thus we disable it.

When external reference support was disabled, this was causing Altera-based
board (VFC-HD) never to generate valid timestamps for frames (pps-gen was never
producing pps_valid=1).

syn/vfchd: prevent quartus flow messages printed to stderr during core generation from stopping the synthesis process

not stop synthesis with error

This is done since the user must provide proper path as well

- for the upcoming release, user must provide path to the  default/release
  bitstream, i.e. <wr-cores location>/bin/wrpc - this information will be
  printed with error
- for future, once we figure out how to get absolute path, the funciton
  and constants for paths are already prepared

xwr_transmission embeds some btrain specific stuff to easy debugging.
This prevented the xwr_transmission from being generically applicable.
Now, the btrain-specific stuff is enabled only if the width of tx/rx
data is sufficient.