We can finally do this with the fix:
2974805 - top/vfchd: disable external reference support

Currently external reference channel doesn't work on vfc-hd, thus we disable it.

When external reference support was disabled, this was causing Altera-based
board (VFC-HD) never to generate valid timestamps for frames (pps-gen was never
producing pps_valid=1).

syn/vfchd: prevent quartus flow messages printed to stderr during core generation from stopping the synthesis process

not stop synthesis with error

This is done since the user must provide proper path as well

- for the upcoming release, user must provide path to the  default/release
  bitstream, i.e. <wr-cores location>/bin/wrpc - this information will be
  printed with error
- for future, once we figure out how to get absolute path, the funciton
  and constants for paths are already prepared

xwr_transmission embeds some btrain specific stuff to easy debugging.
This prevented the xwr_transmission from being generically applicable.
Now, the btrain-specific stuff is enabled only if the width of tx/rx
data is sufficient.

configuration of rx frames filtering by MAC.

The rx streamer used to allow filtering of received streamer frames
by source MAC address. This remote_mac could be dynamicaly configured
but the filtering ena/disable was configured with generic. This is now
a dymanic configuration

this new feature allows to day the instant at which the data is outputed
from the rx streamer. this delay is measured from the instant the streamer's
frame was transmitted. Effectively, the network becomes a fixed-latency
medium

- added generics that are availabel in the tx/rx stremeamer module and wb_adapter
- added overriding of tx/rx cfg (local/remote/target MAC, ethertype) from WB-regs
- added input tx/rx cfg signals

there was only one generic for streamer's data width for both rx and tx.
it seems desirable and handy to have separate generics for the two.
The appropriate change was made accross the boards.

"default_{xilinx,alter}"

instead of declaring in many places the path to the binary with LM32
software, simply say everywhere "default_altera" or "default_xilinx"
and depending on PCS/simulation settings, pick the proper file at the
board (common) level.

The idea behind aux_diag:
- provide generic mechanism to diagnose application connected to WRPC
  via SNMP
- now, it is used to diagnose WR Streamers and later a user can
  define usage of aux_diag
- it can also happen that aux_diag is used for streamers and user-defined
  application

Thus, the following changes were made:
- diag_id=1 is reserved for wr_streamers
- diag_id=0 is reserved for "not used"
- if the input to board is diag_id=0, and streamers are enabled,
  diag_id is 1 and the aux_diag in/out of WRPC is the one of the
  streamers
- if the input to board is diag_id>1, and streamers are enabled,
  diag_id is the input diag_id and the aux_diag in/out of WRPC is
  concatenation of the diag from streamers and input aux_diag
- if the input ot board is diag_id>1, and streamers are disabled,
  diag_id and aux_diag in/out comes from the user

constrained size of the string that is the input to the function

platform/altera: pass external reference clock through the platform module, in order to match the way this is done in the xilinx platform